In recent years, personal computers, mobile phones and PDAs (personal digital assistants) have been required to selectively operate with a plurality of applications by switching from one to another in addition to be compact and lightweight and show a high processing speed. Meanwhile, control devices of robots are required to selectively operate with a plurality of control algorithms by switching from one to another on a real time basis. From this point of view, there is a strong demand for circuit boards carrying reconfigurable circuits, particularly those that allow the circuits to be reconfigured at high speed on a real time basis.
Examples of known reconfigurable circuits include FPGAs (field programmable gate arrays) and CPLDs (complex programmable logic devices). Multi-chip systems using an FPGA where chips are interconnected by electric bus wiring are also known (Japanese Patent Application Laid-Open No. 2000-311156). Additionally, improvements are required to known circuits of the type under consideration in terms of processing speed and circuit scale.
However, since a system disclosed in the above patent document is realized by connecting chips by electric bus wiring, it does not allow reconfiguration of the inter-chip connections with an enhanced degree of freedom.